5-10 years’ experience in ASIC logic verification and strong software skills with experience using 1 or more of the following languages: System Verilog/Verilog, Perl, C/C++. This project is only for US Citizens or permanent Residents.
Candidates should also have experience with RTL simulators, VCS preferred, experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage.
Candidates should also have experience with RTL simulators, VCS preferred, experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage.
To Apply and for
detailed JDs: Please send your profiles at artibhatia@embeddedcareers.com and or get registered at
embeddedcareers.com.
Arti
Bhatia
Marketing Executive
Embedded Careers
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