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Position Title | Engineers with 5 to 7 yrs Exp. of Leading Led a DFT team for at least two SOCs | |
Product Domain Expertise | Semiconductor | |
Skill Category | ASIC Design | |
Position Type | Permanent Employment | |
Hire Timeframe | Immediate to 30 days | |
Job Location | India / Bangalore, Chennai, Delhi, Noida, | |
Experience Level (Years) | 5-6 Years | |
Salary | As Per Industry Standards | |
Qualification | BE/ BTech (Electronics/ Electrical/ Electronics and Communication) MS or MTech would be preferred | |
Mandatory Skills | DFT team for at least two SOCs scan, atpg, structures for delay test, | |
Desirable Skills | LBIST, mixed-signal testing and post-silcon bring up | |
Job Description | ||
Core competencies:
The candidate should have : - Led a DFT team for at least two SOCs - A hold over the complete flow i.e. scan, atpg, structures for delay test, coverage analysis, memory testing, netlist simulations and pattern delivery. - Ability to decide on the take decision on approaches - Ability to decide on the the schedule and effects on it due to different approaches. - Exposure to LBIST, mixed-signal testing and post-silcon bring up - Exposure to timing or synthesis and should be able to decide on the constraints for the same. - Ability to mentor the junior team members and drive them for achieving best results. - Ability to communicate and discuss options with the client |