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Position: VLSI – Design and Verification Engineer
Total experience: 2-8 yrs
Desired profile of the candidate
Solid exposure and Foundation in Digital systems and VLSI design, Computer Architecture, Computer Arithmetic
Strengths in Verilog and C / Perl / Tcl are mandatory
Verification expertise in System Verilog, exposure to other HVLs is a plus
Experience with VMM / OVM / UVM is a plus
Knowledge of Embedded CPUs (MIPS, ARM, C6x) and bus protocols (AMBA, OCP etc) is a definite advantage
Must have worked on Complex SoC / IP block design and verification projects
Expertise in ASIC / FPGA design flows including simulators, functional and code coverage tools, timing analysis and related tools
Excellent Analytical, Abstraction, Communication and Documentation skills
Ability to work with multi-functional, multi-site teams and a desire to work as a team player is a must
Self-driven, result oriented individual with a capability to work as an independent contributor
Motivated to work in a multidisciplinary start-up environment.
