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Showing posts with label Analog/Mixed-Signal Design Engineer (ADC. Show all posts
Showing posts with label Analog/Mixed-Signal Design Engineer (ADC. Show all posts

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Tuesday, May 29, 2012

Opening for Analog/Mixed-Signal Design Engineer (ADC, ADE), Lead Place & Route Engineer, and Senior Hardware Design Experience: 8-10 years. Location: California USA. Apply @ http://embeddedcareers.com/


1) Analog/Mixed-Signal Design Engineer (ADC, ADE).
Requirements:
• Experience should include various Analog-to-Digital Converter (ADC) architecture designs.
• At least 5-10 years of production design experience is required.
• Cadence schematic capture, Analog Design Environment (ADE), and layout knowledge is required.
• B.S. or higher in Electrical Engineering or equivalent degree.
• Strong verbal communication skill.

Desirable:
• Experience with various ADC architectures is preferred.
• Experience designing CMOS/CCD image sensors is highly desired.

2)Lead Place & Route Engineer for 40nm projects

Project Description:
1.) Large 50M gates device, including analog RF target to run at 15-20GHz
2.) Large 37M gates device, including 13 power islands, fast SerDes interfaces

Duties and Responsibilities:
• work on complex block P&R and/or top level P&R
• assist leading and guiding block designers
• analyze and propose solution to meet timing closure and schedule
• assist in communicating with customer and manage expectations

Required skills (must haves):
• P&R, STA , Formal Verification
• IR/EM drop; power analysis
• Experience with advanced nodes (40nm and below)

Specific tool experience required:
• Magma - Talus, Tekton (STA), Synopsys - Formality
• TCL and scripting 
• Synopsys Design Constraints. (SDC), DC & PrimeTime

Education and years of experience:
• BSEE required, MSEE preferred.
• 5-10+ years experience
3)Senior Hardware Design Engineer.

Job Description:

We are looking for a Senior Hardware Engineer with experience in any combination of these:

• Formal Verification (LEC)
• GLS (Gate Level Simulation)
• Netlist ECOs
• Builds, methodology, scripting
• Synthesis & constraints
• Digital design using Verilog and/or verification of same
• Timing closure, code Linting
• BS/MS in EE or CS

Additional Information:

** Candidates MUST be US Citizen or US Permanent Resident (green card holder) or able to obtain a TN visa (for citizens of Canada and Mexico only) or require H1B transfer only.



To Apply and for detailed JDs: Please send your profiles atartibhatia@embeddedcareers.com and or get registered at embeddedcareers.com.

Arti Bhatia                                                                    
Marketing Executive
Embedded Careers