Openings for Senior Software Engineer/Technical Leader/Senior Technical Leader. (Embedded, ASIC, Datacom & Mobile domain). Experience: 3-10 years. Location Delhi, Noida, gurgaon (India), USA, France

Apply at http://embeddedcareers.com/. Rush your profiles at artibhatia@embeddedcareers.com.

1) IPSec:-
* C/C++, Linux
* Strong theoretical and hands on experience in IKE, IKEv2, MOBIKE, IPSec,
* Working knowledge of SSL and SSH
* Knowledge and experience in security ACL framework implementation
* Working knowledge in Cavium, intel, Broadcom and other chipsets, specifically working with their crypto engines. 
* Experience with data compression applications
* Development/Integration exposure in: PKCS, PKI, ISKAMP, XAUTH, AH, ESP, SSL/TLS, DES, TDES, AES, EAP-TLS, X.509, X9.42, ...
* In depth understanding of public/private key cryptography.

2) IPV6:
* C/C++, Linux
* Mandatory: Hands on Ipv6 experience - How the IPv6 works at linux kernel, ND and with routing
* Ability to explain the complete packet flow for ipv4 and ipv6:
* Routing Experience -OSPF, IS-IS
* Packet arrives at Linux stack and processing steps for ND and TCP/Stack processing
* IP Interface creation - Interface management, Routing, RTM, Linux kernel RTM, ND

3) L2/L3:
* C/C++, Linux
* Experience working on L2 functionality such as VPLS, PWEs
* Experience working on any of the Ethernet OAM protocols such as 802.1ag, Y.1731, E-LMI, 802.3ah
* Good knowledge of spanning tree protocols (STP, RSTP, MSTP)
* link level redundancy mechanisms such as LAG, APS
* Keywords: 
o L2 Switching, VLAN, STP, RSTP, MSTP, LACP
o L3 Routing, IPv4, RIP, OSPF, BGP, ISIS, IGMP, PIM
o OTN, TDM, C/DWDM, Optical, Sonet/SDH, Broadband
o MPLS, GMPLS, MPLS-TP, QoS
o Network processor, ASIC, Datapath

4) Sr. Software Engineer (Embedded Developer)

            Debugging Hardware modules

·           Creation and understanding of Schematic and PCB design

2-3 years of C# or VC++ development experience will be an added advantage

5) Embedded Application Engineer

Wind River products, embedded computing, and industry expertise

Low level device driver, BSP, and OS development experience, networking experience a plus

6) ASIC Physical Design Engineer

The candidate is expected to work with a team of engineers and participate in all facets of digital ASIC/SOC physical design such as developing detailed design requirements, architecture and micro-architecture development, conduct design reviews, RTL design, unit/chip level simulation, FPGA prototyping, Timing closure, Tape-out, and post-Si debug, product support etc. The position also requires the candidate to work with cross functional teams for system level solution.

Ability to travel to customer sites

Apply @  http://embeddedcareers.com/

For Detailed JDs: 
Logon to Website: http://embeddedcareers.com/login.php
Mailto: artibhatia@embeddedcareers.com

Regards

Arti Bhatia 
Marketing Executive
Embedded Careers Email: artibhatia@embeddedcareers.com
LinkedIn: http://in.linkedin.com/in/artibhatia